Home
Author Guide
Editor Guide
Reviewer Guide
Special Issues
Special Issue Introduction
Special Issues List
Topics
Published Issues
2024
2023
2022
2021
2020
2019
2018
2017
2016
2015
2014
2013
2012
2010
2009
2008
2007
2006
journal menu
Aims and Scope
Editorial Board
Indexing Service
Article Processing Charge
Open Access Policy
Publication Ethics
Digital Preservation Policy
Editorial Process
Subscription
Contact Us
General Information
ISSN:
1796-2021 (Online); 2374-4367 (Print)
Abbreviated Title:
J. Commun.
Frequency:
Monthly
DOI:
10.12720/jcm
Abstracting/Indexing:
Scopus
;
DBLP
;
CrossRef
,
EBSCO
,
Google Scholar
;
CNKI,
etc.
E-mail questions
or comments to
editor@jocm.us
Acceptance Rate:
27%
APC:
800 USD
Average Days to Accept:
88 days
3.4
2023
CiteScore
51st percentile
Powered by
Article Metrics in Dimensions
Editor-in-Chief
Prof. Maode Ma
College of Engineering, Qatar University, Doha, Qatar
I'm very happy and honored to take on the position of editor-in-chief of JCM, which is a high-quality journal with potential and I'll try my every effort to bring JCM to a next level...
[Read More]
What's New
2024-11-25
Vol. 19, No. 11 has been published online!
2024-10-16
Vol. 19, No. 10 has been published online!
2024-08-20
Vol. 19, No. 8 has been published online!
Home
>
Published Issues
>
2020
>
Volume 15, No. 4, April 2020
>
FPGA Implementation of Tracking Phase of the GPS Receiver Using XSG
M. El Hawary
1,2
, G. G. Hamza
1
, Abdelhaliem Zekry
2
, and I. Motawie
1
1. National Institute of Standards (NIS), Giza, Egypt
2. Faculty of Engineering, Ain Shams University, Cairo, Egypt
Abstract
—GNSS systems are globally available systems used for positioning and navigation. GNSS receivers are widely used as a standard frequency source for time and frequency measurements. So, a lot of efforts have been made in the design, simulation and real-time implementation of the GNSS receivers. The efforts that were made were to transform the construction of the GNSS receivers from hardware to software by using SDR technology. This facilitates debugging and redesigning these complicated systems. In this paper, the tracking phase of the GPS receiver was completely simulated and implemented on FPGA using the same platform and through a graphical programming language, which is the Xilinx System Generator. So, this paper proves that large systems can be simulated and prototyped through the same platform.
Index Terms
—Global Navigation Satellite System (GNSS), GPS receiver, tracking phase, Software Defined Radio (SDR), Xilinx System Generator (XSG), FPGA Implementation
Cite: M. El Hawary, G. G. Hamza, Abdelhaliem Zekry, and I. Motawie, "FPGA Implementation of Tracking Phase of the GPS Receiver Using XSG," Journal of Communications vol. 15, no. 4, pp. 367-371, April 2020. Doi: 10.12720/jcm.15.4.367-371
Copyright © 2020 by the authors. This is an open access article distributed under the Creative Commons Attribution License (
CC BY-NC-ND 4.0
), which permits use, distribution and reproduction in any medium, provided that the article is properly cited, the use is non-commercial and no modifications or adaptations are made.
9-JCM170518
PREVIOUS PAPER
The Usage of CDN for Live Video Streaming to Improve QoS. Case Study: 1231 Provider
NEXT PAPER
An Approach of Concurrent Communications for Distributed Sensing Networks